The DFI specification is the result of a collaborative and
ongoing effort by industry leaders to describe a common interface
between DDR-DRAM memory controller logic designs and DDR DRAM
physical interface (DDR PHY) designs.
This effort is made possible through the contributions of
experts from recognized leaders in the semiconductor, IP and
electronic design automation (EDA) industries. We wish to thank
ARM, Cadence, Intel, LSI, Synopsys, STMicroelectronics, and Samsung
for participating in the development of the DFI Specification.
"We are very pleased with the quality of the participants
in this effort. These companies truly represent the best minds in
the field, and their contributions to this important industry issue
will bear fruit for years to come."
Marc Greenberg, Product Marketing Director, Cadence
"The resources needed to integrate and verify the memory
controller logic and PHY designs from third-party vendors represent
a significant cost to all parties involved. From a systems
perspective, it was essentially defeating the value proposition for
outsourcing this type of design IP. We now have a motivated team of
experts in this field, pulling together to develop a common
specification that will benefit us all."
Bryan K. Jones, Corporate External IP Management, Mobility Group
SEG/IPVP, Intel Corporation
"Industry-accepted interface specifications simplify
development and facilitate interoperability. The DDR-PHY Interface
specification will help streamline the integration of memory
interface PHYs with high-performance controllers."
Don Friedberg, Director of Foundation IP Solutions, LSI
Corporation
"The collaborative efforts toward a standard PHY
interface, that provides a common high-speed DDR PHY solution for
added convenience in the interface with various memory controllers,
will support ASIC suppliers and customers to maximize development
efficiency by reducing both design resources and verification
costs."
Steve Park, vice president of ASIC and Foundry Engineering, System
LSI, Samsung Electronics
"STMicroelectronics is a strong promoter of open industry
standards. Parallel DRAM interfaces are increasingly becoming a
performance driver for many of our system-on-chip products in
computer peripheral, consumer, telecom, and wireless applications.
It is therefore natural that ST joins the DFI standardization body,
which will benefit our customers with higher performance in our DDR
interfaces."
Pierre Dautriche, AMS and PHY IPs director at
STMicroelectronics.